Von Neumann Architecture (OCR GCSE Computer Science)

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James Woodhouse

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Computer Science

Von Neumann Architecture

What is the Von Neumann architecture?

  • The Von Neumann Architecture is a design of the CPU which was proposed by Mathematician John Von Neumann in the 1940s, which most general-purpose computers are built upon
  • The Von Neumann Architecture outlines how the computer memory, input / output devices and processor all work together 

von-neumann-architecture

The Von-Neumann-architecture

  • It consists of 4 main registers
    • The Program Counter (PC)
    • The Memory Address Register (MAR)
    • The Memory Data Register (MDR)
    • The Accumulator (ACC)
  • For each of the registers you must know 
    • The name of the register
    • Its acronym
    • The purpose of the register

What do each of the registers do?

Program Counter (PC)

  • Holds the memory address of the next instructions to be executed 
  • Increments by 1 as the fetch-decode-execute cycle runs

Memory Address Register (MAR)

  • Holds the memory address of where data or instructions are to be fetched from

Memory Data Register (MDR)

  • Stores the data or instruction which has been fetched from memory

Accumulator (ACC)

Worked example

Complete the table by writing the missing definition or name of each of the common CPU components and registers.

CPU Component or Register

Definition

CU (Control Unit) 

 
 

Stores the address of the data to be fetched from or the address where the data is to be stored. 

 

Stores the address of the next instruction to be fetched from memory. Increments during each fetch-execute cycle. 

Arithmetic Logic Unit // ALU

 

  [4]

CPU Component or Register

Definition

Control Unit // CU

Sends signals to synchronise / control / coordinate the processor

Decode instructions to run the F-E cycle

Memory Address Register // MAR

Stores the address of the data to be fetched from or the address where the data is to be stored. 

Program Counter // PC

Stores the address of the next instruction to be fetched from memory. Increments during each fetch-execute cycle. 

Arithmetic Logic Unit // ALU

Performs mathematical calculations and logical operations

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James Woodhouse

Author: James Woodhouse

James graduated from the University of Sunderland with a degree in ICT and Computing education. He has over 14 years of experience both teaching and leading in Computer Science, specialising in teaching GCSE and A-level. James has held various leadership roles, including Head of Computer Science and coordinator positions for Key Stage 3 and Key Stage 4. James has a keen interest in networking security and technologies aimed at preventing security breaches.